1. Field of the Invention
The invention relates to a method of driving a solid-state image sensor, and more particularly to a method of reading out signal charges from photoelectric transfer devices to vertical CCDs (charge coupled devices) through signal readers when a pulse is applied to the signal readers,
2. Description of the Related Art
These days, there has been developed a camera to be used for a personal computer in order to input images to the computer. An image sensor incorporated in a conventional camera employing a television system such as NTSC and PAL has been conventionally designed to have an interlace system in which a frame is displayed with two fields. For instance, such an image sensor has been suggested in Japanese Unexamined Patent Publications Nos. 62-154891 and 9-275206.
However, an image sensor with an interlace system is accompanied with a problem of low resolution of images. Hence, an image sensor incorporated in a camera is recently designed to have a non-interlace system in order to enhance resolution of images. In a non-interlace system, signals running through horizontal scanning lines constituting a frame are output in time series. A non-interlace system has an advantage that images can be displayed with ease on a screen such as a personal computer. Hence, an image sensor associated with a non-interlace system, that is, a progressive scan type image sensor has been in demand, and thus, has been researched and developed.
FIG. 1 is a plan view of an interline type charge coupled device (CCD) image sensor associated with a progressive scan system. The illustrated CCD image sensor is comprised of an image sensing region 1, a horizontal CCD 2, an output section or a charge detector 3, a plurality of photodiodes 4 arranged in the image sensing region 1 in a two-dimensional matrix, and a plurality of vertical CCDs 5 each located adjacent to each row of photodiodes.
Each of the photodiodes 4 converts a light into a signal electric charge, and accumulates the thus converted electric charge therein. Each of the vertical CCDs 5 vertically transfers signal electric charges having been transferred from the photodiodes 4. An electric charge reader 6 positioned between each of the photodiodes 4 and each of the vertical CCDs 5 reads a signal electric charge out of each of the photodiodes 4 into each of the vertical CCDs 5. The image sensing region 1 except the photodiodes 4, the vertical CCDs 5, and each of the electric charge readers 6 defines an insulating region for insulating a photodiode from another photodiode. The image-sensing region 1 except the photodiodes, the vertical CCDs 5, and the electric charge readers 6 defines a device isolation region 7.
In operation, a light is converted into an electric charge for a certain period of time in each of the photodiodes 4, and the thus generated electric charge is accumulated in each of the photodiodes 4. The electric charges accumulated in the photodiodes 4 are read out into the vertical CCDs 5 through the electric charge readers 6 by applying a certain voltage to the electric charge readers 6. The electric charges having been read out into the vertical CCDs 5 are transferred towards the horizontal CCD 2 line by line. The electric charges having been transferred to the horizontal CCD 2 are horizontally transferred in the horizontal CCD 2, and then, detected at the output section 3 as an output voltage.
FIG. 2 is an enlarged view of a part of the image sensing region 1 of the image sensor associated with the progressive scan system and capable of reading out signals in every three vertical pixels. A part of the image sensing region 1, illustrated in FIG. 2, is defined by vertical five pixels x horizontal three pixels.
Each of the vertical CCDs 5 includes four vertical transfer electrodes 8a, 8b, 8c, and 8d for each of the photodiodes 4. At least one of the vertical transfer electrodes 8a, 8b, 8c, and 8d doubles as a read-out electrode for reading out a signal electric charge from the photodiode 4 to the vertical CCD 5. For instance, the vertical transfer electrode 8b doubles as such a read-out electrode in FIG. 2.
In the image sensor illustrated in FIG. 2, transfer of electric charges in the vertical CCD 5 is carried out by four-phase drive pulses. Specifically, four-phase pulses xcfx86V1 to xcfx86V4 are applied to the vertical transfer electrodes 8a to 8d, respectively, in a four-electrode cycle.
Though the four-phase pulses xcfx86V1 to xcfx86V4 are illustrated as applied only to the vertical transfer electrodes 8a, 8b, 8c and 8d in the rightmost vertical CCD 5 for the purpose of simplification, the same phase pulse is applied to the electrodes located in a common line in the vertical CCDs 5. For instance, the drive pule xcfx86V1 is applied to all the vertical transfer electrodes 8 situated uppermost in the three vertical CCDs 5 illustrated in FIG. 2.
In order to make it possible to read out signals at every three pixel lines, drive pulses xcfx86V3A, xcfx86V3B, and xcfx86V3C can be separately applied to the vertical transfer electrode 8b acting as a read-out electrode at every three pixel lines.
FIG. 3 is an enlarged plan view of a couple of pixels illustrated in FIG. 2. As illustrated in FIG. 3, a transfer channel of the vertical CCD 5 vertically extends adjacently to the photodiode 4. As illustrated in FIG. 4, each of the vertical transfer electrodes 8a to 8d to which an electric charge transfer pulse is to be applied is composed of three-layered polysilicon. One of the vertical transfer electrodes 8a to 8d, specifically, the vertical transfer electrode 8b doubles as a read-out electrode for transferring signal electric charges to the vertical CCDs 5 from the photodiodes 4.
FIG. 4 is a cross-sectional view taken along the line IVxe2x80x94IV in FIG. 3, and illustrates a structure of the vertical transfer electrode 8. As illustrated in FIG. 4, the drive pule xcfx86V1 is applied to a vertical transfer electrode 8-1 constituted of a first polysilicon layer, the drive pulse xcfx86V2 is applied to a vertical transfer electrode 8-2a constituted of a second polysilicon layer deposited over the first polysilicon layer, and the drive pulse xcfx86V3 is applied to a vertical transfer electrode 8-2b constituted of the second polysilicon layer. Since the vertical transfer electrodes 8-2a and 8-2b are electrically insulated from each other, it is possible to apply separate pulses to the vertical transfer electrodes 8-2a and 8-2b, although they are constituted of the common polysilicon layer. The drive pule xcfx86V3 is applied to a vertical transfer electrode 8-3 constituted of a third polysilicon layer deposited over the second polysilicon layer.
FIG. 5 is a cross-sectional view taken along the line Vxe2x80x94V in FIG. 3. As illustrated in FIG. 5, an image sensor is comprised of an n-type substrate 9, a p-type well layer 10 formed in the substrate 9, including an n-type photodiode layer 11 accomplishing photoelectric transfer and accumulating generated signal electric charges, n-type vertical CCD buried layers 12 for vertically transferring electric charges, and an electric charge reader 6 (not illustrated) for reading out electric charges from the photodiode layer 11 into the vertical CCD buried layers 12, p-type vertical CCD well layers 13 located just below the vertical CCD buried layers 12, a heavily doped p-type impurity layer 14 formed above the photodiode layer 11 and between the photodiode layer 11 and the layers 12, 13, an insulating film 15 formed on the p-type well layer 10, vertical CCD transfer electrodes 8 composed of polysilicon and formed within the insulating film 15 above the vertical CCD buried layers 12, and a light-impermeable film 16 formed on the insulating film 15. The light-impermeable film 16 is formed with an opening 17 above the photodiode layer 11.
FIGS. 6A to 6C illustrate how an electric charge is transferred in progressive scanning operation. For simplification, FIGS. 6A to 6C illustrate only one vertical CCD 5, and a part of the horizontal CCD 2 located below the vertical CCD 5. In FIGS. 6A to 6C, a solid circle (xe2x97xaf) indicates a packet containing an electric charge therein.
With reference to FIG. 6A, photodiodes PD1 to PD6 are exposed to a light for a certain period of time to thereby convert a light into signal electric charges, and accumulate the thus generated signal electric charges therein. When a read-out voltage is applied to all the read-out electrodes 6, the signal electric charges accumulated in the photodiodes PD1 to PD6 are read out into the vertical CCD 5.
Then, as illustrated in FIG. 6B, the signal electric charges having been read out into the vertical CCD 5 are vertically transferred towards the horizontal CCD 2 line by line.
Then, as illustrated in FIG. 6C, the signal electric charge having been transferred in the vertical CCD 5 reaches the horizontal CCD 2, and is transferred through the horizontal CCD 2 towards the output section 3. Finally, the signal electric charge is output through the output section 3 (not illustrated in FIGS. 6A to 6C).
FIG. 7 illustrates waveforms of the vertical drive pulses xcfx86V1 to xcfx86V4 and how the electric charges are transferred in progressive scanning operation.
The waveforms of the vertical drive pulses are illustrated over one vertical blanking period and subsequent two horizontal blanking periods. The vertical drive pulses are four-phase pulses. When read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are applied to the vertical CCDs 5, the signal electric charges are read out of the photodiodes 4 into the vertical CCDs 5.
In FIG. 7, the read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are shown as independent pulses, however, it should be noted that the read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are applied to the vertical transfer electrode 8b doubling as a read-out electrode in the form that the read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are overlapped onto the vertical drive pulses xcfx86V3A, xcfx86V3B, and xcfx86V3C, respectively.
How the electric charges are transferred is shown in a lower half of FIG. 7. The photodiodes 4 and the vertical transfer electrodes 8 are illustrated at the left end. Lowermost rows indicate horizontal transfer electrodes constituting the horizontal CCD 2. A horizontal drive pulse xcfx86H1 is applied to the horizontal transfer electrodes.
In a lower half of FIG. 7, a hollow rectangle indicates a vertical transfer electrode having a packet in which electric charge can be accumulated, but containing no signal electrode charge, and a hatched rectangle indicates a vertical transfer electrode containing a packet in which electric charge is accumulated. Transfer of electric charges with the lapse of time can be understood by virtue of the signal waveforms illustrated in an upper half of FIG. 7, and it is also understood that a signal electric charge is located adjacent to which vertical CCD at a certain timing, by virtue of the photodiodes 4 and the vertical transfer electrodes 8 illustrated at the left. Thus, it is understood how electric charges are transferred.
With reference to FIG. 7, when the vertical drive pulses xcfx86V1 to xcfx86V4 are in a middle level, a channel located below the associated vertical transfer electrode 8 is ready to accumulate electric charges therein. When the vertical drive pulses xcfx86V1 to xcfx86V4 are in a low level, a channel located below the associated vertical transfer electrode 8 is not ready to accumulate electric charges therein.
When the read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are in a high level, a signal electric charge is read out from an associated photodiode 4 into the vertical CCD 5. When the read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are in a low level, a signal electric charge is not read out.
At time t1, all the read-out pulses xcfx86TGA, xcfx86TGB, and xcfx86TGC are simultaneously turned into a high level, and signal electric charges accumulated in all the photodiodes 4 are read out into the vertical CCDs 5. The thus read out signal electric charges are accumulated in both a channel located below the vertical transfer electrode 8 associated with the vertical drive pulse xcfx86V3 which is in a high level, and a channel located below the vertical transfer electrode 8 associated with the vertical drive pulse xcfx86V4 which is in a middle level Thereafter, the signal electric charges are downwardly, vertically transferred in each of the vertical CCDs 5 by a pixel in a horizontal blanking period.
FIG. 8A illustrates the photodiodes 4 and the vertical transfer electrodes 8 in an image sensor in which a pulse is applied to vertical transfer electrodes in every three pixel lines, and FIG. 8B illustrates waveforms of a pulse to be applied when electric charges are transferred from the photodiodes 4 to the vertical CCD 5. Specifically, FIG. 8B illustrates waveforms of the pulses xcfx86V3A, xcfx86V3B and xcfx86V3C to which the pulses xcfx86TGA, xcfx86TGB and xcfx86TGC are overlapped, respectively.
The pulses xcfx86V3A, xcfx86V3B and xcfx86V3C are kept at a middle level, for instance, at 0 V, before electric charges accumulated in the photodiodes 4 are read out into the vertical CCDs 5. At time t1, all the pulses xcfx86V3A, xcfx86V3B and xcfx86V3C are raised up to a high level, for instance, 15 V. As a result, channels of the electric charge readers 6 are turned on, and accordingly, signal electric charges accumulated in the photodiodes 4 are read out into the vertical CCDs 5.
In order to ensure that all electric charges are read out into the vertical CCDs 5, the pulses xcfx86V3A, xcfx86V3B and xcfx86V3C are kept at the high level for about 2 xcexcs. Then, all the pulses xcfx86V3A, xcfx86V3B and xcfx86V3C are fell down to the middle level at time t2. As a result, the channels of the electric charge readers 6 are turned off.
In the above-mentioned progressive scan type image sensor, high positive voltage pulses of about 15 V are concurrently applied to all the electric charge readers 6. As a result, there was caused a problem that a ground potential in the p-type well layer 10 was fluctuated due to the application of the pulse voltages, and hence, a substrate voltage at which electric charges were reversely transferred into the photodiodes 4 was raised (hereinafter, such a substrate voltage is referred to as xe2x80x9creverse-transfer substrate voltagexe2x80x9d).
This problem is explained in detail hereinbelow.
FIG. 9 illustrates a relation between potential of electrons and a depth in a substrate at the time when a standard substrate voltage is set. As illustrated in FIG. 5, an impurity profile in a depth-wise direction of the substrate included the heavily doped p-type impurity layer 14, the n-type photodiode layer 11, the p-type well layer 10, and the n-type substrate 9. In such a structure, the potential is kept at 0V for electrons existing in the heavily doped p-type impurity layer 14, and the potential makes a valley for electrons existing in the n-type photodiode layer 11. A ground potential of 0V is applied to the p-type well layer 10, and a voltage in the range of about 5V to about 8is applied to the substrate 9.
Since the p-type well layer 10 is doped to a less degree than the heavily doped p-type impurity layer 14, an impurity concentration of the p-type well 10 is influenced by the substrate voltage and other electrodes"" voltages.
For instance, as illustrated in FIG. 10, if the substrate voltage is raised up to about 10 to 15 V, a potential in the p-type well layer 10 is varied together with the substrate voltage so that a potential in the p-type well layer 10 becomes deeper, resulting in that a capacity of the photodiode is decreased.
On the other hand, if the substrate voltage is raised up to about 2V, as illustrated in FIG. 11, a difference in potential between a potential for the photodiode and the substrate voltage is reduced, resulting in that electric charges are reversely transferred from the substrate to the photodiodes. In such a condition, the image sensor cannot operate. For this reason, a substrate voltage is usually set equal to a voltage higher than the reverse-transfer voltage by about 1V.
Specifically, since the reverse-transfer voltage is in the range of about 2 to 3V, a minimum substrate voltage can be set at 3 to 4 V.
As mentioned above, the reverse-transfer voltage is relatively low in conventional television system such as NTSC and PAL where read-out pulse are not applied to all the transfer electrodes at a time. This is because a timing at which electric charges are to be read out in a line is different from other timings at which electric charges are to be read out in other lines, in a conventional television system usually operated in accordance with the interlace system.
However, since pulses are simultaneously applied to all the electrodes in such a progressive scan type image sensor as mentioned above, there was caused a problem that a ground potential in the p-type well layer was fluctuated due to the application of the pulse voltage, and hence, the reverse-transfer voltage was raised.
As a result, as illustrated in FIG. 12, since a highly positive voltage, for instance, a voltage of 15V is applied to the read-out electrodes as a pulse for reading out electric charges, a potential for the n-type photodiode layer in the photodiode is fluctuated, and a potential for the photodiodes is fluctuated to be deepened relative to a case where no read-out voltage is applied.
Under such a circumstance, even if a substrate voltage is set equal to 5V as usual, for instance, such a substrate voltage is low in view of a relation between a potential for the photodiode and the substrate voltage, As a result, electric charges are readily reversely transferred from the substrate to the photodiodes, as shown with the curve C2 in FIG. 12. In such a case, the reverse-transfer voltage is raised up to about 5 to 6V.
Hence, the substrate voltage has to be set equal to 6 to 7V, because the substrate voltage is necessary to be set higher than the reverse-transfer voltage by about 1V. This means that an image sensor has to operate with a small amount of electric charges being accumulated in the photodiodes. As a result, it is not possible to accumulate a large amount of electric charges in the photodiodes, and hence, a dynamic range is restricted, and highly qualified image outputs cannot be obtained.
In view of the above-mentioned problems, it is an object of the present invention to provide a method of driving an image sensor which method is capable of preventing the reverse-transfer voltage from being increased.
There is provided a method of driving a solid-state image sensor, including the steps of (a) transferring signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in every two or more pixel lines so that a pulse to be applied in a first pixel line and a pulse to be applied in a second pixel line are applied at different timings, (b) transferring the signal charges from the vertical CCDs to a horizontal CCD, and (c) outputting the signal charges from the horizontal CCD to an external circuit,
There is further provided a method of driving a solid-state image sensor, including the steps of (a) transferring signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in every two or more pixel lines so that a trailing edge of a first pulse to be applied in a first pixel line is in synchronization with a leading edge of a second pulse to be applied in a second pixel line, (b) transferring the signal charges from the vertical CCDs to a horizontal CCD, and (c) outputting the signal charges from horizontal CCD to an external circuit.
It is preferable that at least two trailing edges of pulses are in synchronization with leading edges of other pulses, respectively.
There is still further provided a method of driving a solid-state image sensor, including the steps of (a) transferring signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in every two or more pixel lines so that a trailing edge of a pulse to be applied in a pixel line is in synchronization with a leading edge of a pulse to be applied in an adjacent pixel line, (b) transferring the signal charges from the vertical CCDs to a horizontal CCD, and (c) outputting the signal charges from horizontal CCD to an external circuit.
There is yet further provided a method of driving a solid-state image sensor, including the steps of (a) transferring signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in every two or more pixel lines so that a trailing edge of a pulse applied to the first pixel line is in synchronization with a leading edge of a pulse applied to the last pixel line, (b) transferring the signal charges from the vertical CCDs to a horizontal CCD, and (c) outputting the signal charges from horizontal CCD to an external circuit.
It is preferable that the pulses are applied to pixel lines at the same interval. It is also preferable that the pulses are applied to pixel lines at the same period of time.
There is still yet further provided a method of reading out signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in every two or more pixel lines s0 that pulses are applied to adjacent pixel lines at different timings.
There is further provided a method of reading out signal charges from photoelectric transfer devices to vertical CCDs constituted of a plurality of pixels, when a pulse is applied to the pixel, the pulse being applied to the pixels in every two or more pixel lines so that a trailing edge of a first pulse to be applied in a first pixel line is in synchronization with a leading edge of a second pulse to be applied in a second pixel line.
The advantages obtained by the aforementioned present invention will be described hereinbelow.
In accordance with the present invention, a plurality of pulses for reading electric charges from photodiodes to vertical CCDs are synchronized with each other so that they are cancelled with each other, to thereby ensure eliminate fluctuation in a ground potential of a p-type well layer which fluctuation would be caused due to application of high positive voltages to the vertical CCDs, and further prevent an increase in the reverse-transfer voltage.
The prevention of an increase in the reverse-transfer voltage in turn make it possible to set a lower substrate voltage, and to enhance a saturated amount of electric charges for a photodiode. This results in that a dynamic range can be widened, and highly qualified images can be obtained.
In addition, in accordance with the present invention, a plurality of pulses is cancelled with each other at least once. As a result, it is possible to minimize a gap in time for accumulating electric charges in the photodiodes. Hence, disturbance in images, caused by a difference in time for accumulating electric charges in the photodiodes, can be reduced to such a degree as it is no longer a problem.